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Analysis of charge transport in a polycrystalline pentacene thin film transistor by temperature and gate bias dependent mobility and conductance

J. Appl. Phys. 102, 023706 (2007); doi:10.1063/1.2753671

Published 17 July 2007

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Dong Guo, Tetsuhiko Miyadera, Susumu Ikeda, Toshihiro Shimada, and Koichiro Saiki
Department of Complexity Science and Engineering, Graduate School of Frontier Sciences, The University of Tokyo, Kashiwanoha 5-1-5, Kashiwa, Chiba 277-8561, Japan
The gate bias and temperature dependent field-effect mobility and conductance of a polycrystalline pentacene thin film transistor (TFT) were analyzed to study the charge transport in the material. Since both heating and cooling can obviously change the film morphology, a relatively narrow temperature range was adopted to rule out the possible influence of structure variation on the device characterization. Both mobility and conductance values increased with the gate bias and showed a thermally activated Arrhenius-like behavior, while the threshold voltage deceased with temperature. Several models were compared, and it was found that the observations could only be well interpreted by a multiple trapping model, which suggests that the temperature and gate bias dependences should be attributed to the increased free charge carrier density. The density of trap states in the band gap was evaluated by the field-effect mobility as well as the field-effect conductance data. The results disclose a possible field-effect mobility much higher than the present record in a polycrystalline pentacene TFT. ©2007 American Institute of Physics
History: Received 4 January 2007; accepted 1 June 2007; published 17 July 2007
Permalink: http://link.aip.org/link/?JAPIAU/102/023706/1
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KEYWORDS and PACS

Keywords
PACS
  • 85.30.Tv
    Semiconductor field effect devices
  • YEAR: 2007

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0021-8979 (print)   1089-7550 (online)
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