Applied Physics Letters, 17 November 2008
Appl. Phys. Lett. 93, 203308 (2008) (3 pages)
©2008 American Institute of Physics. All rights reserved. Rightslink - Permissions for ReusePermissions for ReuseAbout Rightslink

Previous section: REFERENCES
Next section: FOOTNOTES
Title Page

FIGURES


Full figure (30 kB)

Fig. 1. (Color online) Procedure of fabricating self-aligned all-polymer thin-film transistors (TFTs) with UV printing. (a) PEDOT coated PDMS mold is placed in contact with the PUA coated flexible substrate, and (b) it is UV printed. (c) Upon removing the PDMS mold, PEDOT source-drain layers are transferred onto the substrate. (d) Active and dielectric layers are spin coated in sequence. [(e) and (f)] Using PEDOT coated glass substrate, self-aligned gate layer is contact printed on the dielectric layer. First citation in article


Full figure (19 kB)

Fig. 2. SEM images of (a) PEDOT source and drain electrodes formed across the 10  µm long channel and (b) 700 nm line and 900 nm space pattern fabricated by UV printing. First citation in article


Full figure (38 kB)

Fig. 3. (Color online) (a) Cross-sectional AFM images of the channel mound taken before (left) and after (right) spin coating of active and dielectric layers. (b) Optical microscopic images of the channel before (left figures) and after (right figures) contact printing of PEDOT gate electrode on dielectric layer. First citation in article


Full figure (30 kB)

Fig. 4. Electrical characteristics of self-aligned all-polymer TFT fabricated on flexible substrate. (a) Transfer characteristics at drain voltage of −70  V. (b) Output characteristics at various gate voltages. First citation in article


Previous section: REFERENCES
Next section: FOOTNOTES
Title Page